Large Signal Analysis of RF Circuits in Device Simulation

Zhiping YU  Robert W. DUTTON  Boris TROYANOSKY  Junko SATO-IWANAGA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E82-C   No.6   pp.908-916
Publication Date: 1999/06/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on TCAD for Semiconductor Industries)
Category: 
Keyword: 
device simulation,  RF,  large signal,  distortion analysis,  harmonic balance,  

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Summary: 
As wireless communication is penetrating every corner of the globe, the optimum design and accurate analysis of RF, power semiconductor devices become one of the biggest challenges in EDA and TCAD (Technology CAD) tool development. The performance gauge for these devices is quite different from that for either digital or analog devices aimed at small-signal applications in that the power gain, efficiency, and distortion (or the range of linearity) are the utmost design concerns. In this article, the methodology and mathematical foundation for numerical analysis of large signal distortion at the device simulation level are discussed. Although the harmonic balance (HB) method has long been used in circuit simulation for large signal distortion analysis, the implementation of the same method in device simulation faces daunting challenges, among which are the tremendous computational cost and memory storage management. But the benefits from conducting such a device level simulation are also obvious--for the first time, the impact of technology and structural variation of device on large signal performance can directly be assessed. The necessary steps to make the HB analysis feasible in device simulation are outlined and algorithmic improvement to ease the computation/storage burden is discussed. The applications of the device simulator for various RF power devices, including GaAs MESFETs and silicon LDMOS (lateral diffusion MOS) are presented, and the insight gained from such an analysis is provided.