2-Dimensional Simulation of FN Current Suppression Including Phonon Assisted Tunneling Model in Silicon Dioxide

Katsumi EIKYU  Kiyohiko SAKAKIBARA  Kiyoshi ISHIKAWA  Tadashi NISHIMURA  

IEICE TRANSACTIONS on Electronics   Vol.E82-C   No.6   pp.889-893
Publication Date: 1999/06/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on TCAD for Semiconductor Industries)
neutral trap,  phonon assisted tunneling,  FN current,  endurance characteristic,  

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A gate oxide excess current model is described based on the phonon-assisted tunneling process of electrons into neutral traps. The influence on local electric field of charge of electrons trapped by neutral traps in gate oxide is simulated using a two-dimensional device simulator into which the new model is incorporated. FN current is suppressed with an increase in the neutral trap density to over 1019 cm-3. The calculated results reflect the endurance characteristics of flash memories in which erase/write operation speed depends on FN current.