Effect of 300 mm Wafer Transition and Test Processing Logistics on VLSI Manufacturing Final Test Process Efficiency and Cost

Akihisa CHIKAMURA  Koji NAKAMAE  Hiromu FUJIOKA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E82-C   No.4   pp.638-645
Publication Date: 1999/04/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
Keyword: 
300 mm wafer,  lot size,  test processing logistics,  production dispatching rule scheduling,  express lot,  cost,  final test process,  LSI manufacturing,  discrete event simulation,  

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Summary: 
The effect of lot size change and test processing logistics on VLSI manufacturing final test process efficiency and cost due to the transition of from conventional 5 or 6 inches to 300 mm (12 inches) in wafer size is evaluated through simulation analysis. Simulated results show that a high test efficiency and a low test cost are maintained regardless of arrival lot size in the range of the number of 300 mm wafers per lot from 1 to 25 and the content of express lots in the range of up to 50% by using WEIGHT+RPM rule and the right final test processing logistics. WEIGHT+RPM rule is the rule that considers the jig and temperature exchanging time, the lot waiting time in queue and also the remaining processing time of the machine in use. The logistics has a small processing and moving lot size equal to the batch size of testing equipment.