IC Implementation of a Switched-Current Chaotic Neuron

Ruben HERRERA  Ken SUYAMA  Yoshihiko HORIO  Kazuyuki AIHARA  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E82-A   No.9   pp.1776-1782
Publication Date: 1999/09/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Nonlinear Theory and Its Applications)
Category: 
Keyword: 
chaotic neural network,  switched-current circuit,  

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Summary: 
A switched-current integrated circuit, which realizes the chaotic neuron model, is presented. The circuit mainly consists of CMOS inverters that are used as transconductance amplifiers and nonlinear elements. The chip was fabricated using a 1.2 µm HP CMOS process. A single neuron cell occupies only 0.0076 mm2, which represents an area smaller than the one occupied by a standard bonding pad. The circuit operation was tested at a clock frequency of 2 MHz.