For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
A CMOS Offset Phase Locked Loop for a GSM Transmitter
Taizo YAMAWAKI Masaru KOKUBO Hiroshi HAGISAWA
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/02/25
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
CMOS GSM transmitter PLL,
Full Text: PDF>>
This paper describes a CMOS Offset Phase Locked Loop (OPLL) for a global system for mobile communications (GSM) transmitter. The OPLL is a PLL with a down-conversion mixer in the feedback path and is used in the transmit (Tx) path as a frequency converter. It has a tracking bandpass filter characteristic in such a way that the OPLL can suppress the noise in the GSM receiving band (Tx noise) without a duplexer. When the loop bandwidth of the OPLL was 1.0 MHz, the Tx noise level of -163.5 dBc/Hz, the phase error of 0.66rms, and the settling time of 40µs were achieved. The IC was implemented by using 0.35-µm CMOS process. It takes 860µm620µm of total chip area and consumes 17.6 mA with a 3.0 V power supply.