Performance Enhancement on Digital Signal Processors with Complex Arithmetic Capability

Yoshimasa NEGISHI  Eiji WATANABE  Akinori NISHIHARA  Takeshi YANAGISAWA  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E82-A   No.2   pp.238-245
Publication Date: 1999/02/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on VLSI for Digital Signal Processing)
Category: 
Keyword: 
digital signal processor,  digital signal processing,  complex signal processing,  digital filter,  complex multiplier,  

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Summary: 
Digital Signal Processors with complex arithmetic capability (DSP-C) are useful for various applications. In this paper, we propose a method for the effective implementation of specific circuits with real coefficients on DSP-C. DSP-C has special hardware such as a complex multiplier so that a complex calculation can be performed with only one instruction. First, we show that nodes with two real coefficient input branches can be implemented by complex multiplications. We apply this implementation to 2D circuits and transversal circuits with real coefficients. Next, we introduce a new computational mode (Advanced mode) and a new multiplier into PSI, a kind of DSP-C which has been proposed already, in order to process the circuits effectively. The effectiveness of the proposed method is shown by simulation in the last part.