For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Analysis of the Relation between Chip Rate and Capacity in DS/CDMA Cellular Systems Considering Adjacent Channel Interference
Kouta KINOSHITA Hiroyuki ATARASHI Yoshihiro ISHIKAWA Seizo ONOE Yoshinobu NAKAMURA Masao NAKAGAWA
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/12/25
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Spread Spectrum Techniques and Applications)
chip rate, DS/CDMA, adjacent channel interference,
Full Text: PDF>>
While higher chip rate can provide better performance for Direct Sequence/Code Division Multiple Access (DS/CDMA) systems due to larger process gain, it may also induce spectrum emission to adjacent channels, i. e. , adjacent channel interference. Especially, if different operators use adjacent channels in the same area with uncoordinated power levels, such interference becomes large, and excessively higher chip rate will decrease the efficiency of a system. In this context, this paper evaluates the relation between chip rate and capacity in DS/CDMA cellular communication systems considering adjacent channel interference from other systems. First, the classification of adjacent channel interference between two independent DS/CDMA systems is described, and the concrete interference levels are calculated for several chip rates. Then, by using computer simulation, the system CDMA capacity is evaluated under adjacent channel interference. From these results, we can find that the excessively higher chip rate can not always provide the larger system CDMA capacity in spite of the larger process gain, and there exists the appropriate chip rate for a certain given bandwidth.