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RSPICE: A Fast and Robust Timing Simulator for Digital MOS VLSI
Xia CAI Huazhong YANG Yaowei JIA Hui WANG
Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Vol.E82A
No.11
pp.24922498 Publication Date: 1999/11/25
Online ISSN:
DOI:
Print ISSN: 09168508 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: fast timing simulation, analytical solution, tablebased MOS model, waveform relaxation,
Full Text: PDF(992.1KB)>>
Summary:
RSPICE, a fast timing simulator for large digital MOS circuits, is presented in this paper. A new tablebased regionwise linear MOS transistor model and the analytical solution of the generic subcircuit primitive are applied to calculate the transient response of digital MOS circuits. The body effect of pass transistors is included in the MOS model and the floating capacitor network can be handled by this subcircuit primitive as well. In RSPICE, MOS transistors with a DC path are grouped into a DCconnected block (DCCB), and DCCBs with a feedback path are combined as a strongly connected component (SCC). RSPICE orders SCCs by Tarjan's algorithm and simulates ordered SCCs one by one. DCCBs are basic cells in RSPICE and any DCCB can be mapped into one or more subcircuit primitives. In order to calculate the transient response of these primitives analytically, RSPICE approximates the input signals of the primitive by piecewise linear functions. To compromise the simulation accuracy and run time, partial waveform and partial time convergent (PWPTC) combined with dynamic windowing technique is applied to simulate SCCs. Other key issues of RSPICE, such as circuit partition, passtransistor and floatingcapacitor processing, simulationflow control and waveform modification are also discussed in detail. Compared with HSPICE , the simulation result of RSPICE is very accurate with an error less than 3%, but the speed is 12 orders over HSPICE.

