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Zero Common-Mode Gain Fully Balanced Circuit Structure
Moonjae JEONG Shigetaka TAKAGI Nobuo FUJII
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/10/25
Print ISSN: 0916-8508
Type of Manuscript: PAPER
Category: Analog Signal Processing
fully balanced circuit structure, integrator, filter,
Full Text: PDF(804.7KB)>>
This paper proposes a fully balanced circuit structure with a zero common-mode gain. The common-mode gain of the proposed structure becomes theoretically zero with a perfect device matching. Even if a perfect device matching is not achieved, the common-mode signal can be sufficiently suppressed by the feedback loops provided with the structure. Based on this concept, an integrator is composed. Furthermore the concept can be directly applied to a filter design. The application results in reduced chip area. A design example of a second-order filter and simulation results verify the theoretical expectation.