On Testing of Josephson Logic Circuits Composed of the 4JL Gates

Teruhiko YAMADA  Tsuyoshi SASAKI  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E81-D   No.7   pp.749-752
Publication Date: 1998/07/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8532
Type of Manuscript: Special Section LETTER (Special Issue on Test and Diagnosis of VLSI)
Category: 
Keyword: 
Josephson logic circuit,  test,  defect coverage,  

Full Text: PDF>>
Buy this Article




Summary: 
We have specified typical fabrication defects of the current injection logic gates with four Josephson junctions (4JL gates), and then investigated the voltage and current behavior of defective gates by SPICE simulation to evaluate the defect coverage achieved by logic testing and current testing. The simulation results show that current testing may possibly achieve a high defect coverage while logic testing cannot detect almost half defects.