Cellular Automata Implementation of TPG Circuits for Built-In Two-Pattern Testing

Kiyoshi FURUYA  Naoki NAKAMURA  

IEICE TRANSACTIONS on Information and Systems   Vol.E81-D   No.7   pp.675-681
Publication Date: 1998/07/25
Online ISSN: 
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Issue on Test and Diagnosis of VLSI)
Category: Built-in Self-Test
cellular automata,  built-in self-testing,  TPG circuit,  random pattern generation,  

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Cellular automata (CA) implementations are expected as potential test-pattern generators (TPGs) for Built-In Self-Testing of VLSI circuits, in which highly random parallel patterns ought to be generated with simple hardware. Objective here is to design one-dimensional, binary, and linear CA implementations with cyclic boundary conditions that can operate on maximum length of period. To provide maximum period of operations, it is necessary to bring some irregularities into the configurations. It is also expected for TPGs to make maximum or sufficiently long period of operations to prevent re-initialization. Our approach is to generate transition matrices based on fast parallel implementations of LFSRs which have trinomials as characteristic polynomials and then to modify the diagonal components. Some notable properties of diagonal vectors were observed.