A 40-Gb/s 88 ATM Switch LSI Using 0. 25-µmCMOS/SIMOX

Yusuke OHTOMO  Sadayuki YASUDA  Masafumi NOGAWA  Jun-ichi INOUE  Kimihiro YAMAKOSHI  Hirotoshi SAWADA  Masayuki INO  Shigeki HINO  Yasuhiro SATO  Yuichiro TAKEI  Takumi WATANABE  Ken TAKEYA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E81-C   No.5   pp.737-745
Publication Date: 1998/05/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: Network
Keyword: 
SOI,  CMOS,  ATM,  high-speed,  

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Summary: 
The switch LSI described here takes advantage of the special characteristics of fully-depleted CMOS/SIMOX devicesthat is, source/drain capacitances and threshold voltages that are lower than those of conventional bulk CMOS devicesto boost the I/O bit rate. The double-edge triggered MUX/DEMUX which uses a frame synchronization logic, and the active-pull-up I/O provide a 144-pin, 2. 5-Gbps/pin interface on the chip. The 220-kgate rerouting banyan switching network with 110-kbit RAM operates at an internal clock frequency of 312 MHz. The CMOS/SIMOX LSI consumes 8. 4 W when operating with a 2-V power supply, and has four times the throughput of conventional one-chip ATM switch LSIs.