An LSI for Low Bit-Rate Image Compression Using Vector Quantization

Kazutoshi KOBAYASHI  Noritsugu NAKAMURA  Kazuhiko TERADA  Hidetoshi ONODERA  Keikichi TAMARU  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E81-C   No.5   pp.718-724
Publication Date: 1998/05/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: 
Keyword: 
parallel processor,  memory-based,  vector quantization,  low bit-rate image compression,  low power,  SIMD,  

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Summary: 
We have developed and fabricated an LSI called the FMPP-VQ64. The LSI is a memory-based shared-bus SIMD parallel processor containing 64 PEs, intended for low bit-rate image compression using vector quantization. It accelerates the nearest neighbor search (NNS) during vector quantization. The computation time does not depend on the number of code vectors. The FMPP-VQ64 performs 53,000 NNSs per second, while its power dissipation is 20 mW. It can be applied to the mobile telecommunication system.