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A High-Performance Multicast Switch and Its Feasibility Study
Shigeo URUSHIDANI Shigeki HINO Yusuke OHTOMO Sadayuki YASUDA
IEICE TRANSACTIONS on Communications
Publication Date: 1998/02/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on ATM Switching Systems for future B-ISDN)
Category: Multicasting in ATM switch
ATM, switch, multicast, rerouting, banyan, LSI,
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This paper describes the design and evaluation of a high-performance multicast ATM switch and its feasibility study, including its 40 Gbit/s LSI packaging. The multicast switch is constructed using a serial combination of rerouting networks and employs an adapted Boolean interval-splitting scheme for a generalized self-routing algorithm. Analysis and computer simulation results show that the cell loss probability is easily controlled by increasing the number of switching stages. It is shown that the switch configuration can be transformed into other patterns to be built from banyan-based subnetworks of arbitrary size for LSI packaging. It is also shown that an LSI chip integrating an 88 banyan-based subnetwork using 0. 25-µm CMOS/SIMOX technology can attain a 40-Gbit/s switching capability.