Implementation of Fast ATM Protection Switching Function on ATM Nodes

Ken'ichi SAKAMOTO  Morihito MIYAGI  Masahiro TAKATORI  Takahiko KOZAKI  Akihiko TAKASE  

IEICE TRANSACTIONS on Communications   Vol.E81-B   No.2   pp.237-243
Publication Date: 1998/02/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on ATM Switching Systems for future B-ISDN)
Category: ATM switching architecture
ATM,  rerouting,  protection,  SDH,  APS,  

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This paper proposes implementation methods of fast ATM layer protection switching function. The main problem in attaining fast ATM protection is the number of connections in one transmission path. The transmission delay of the signal for protection negotiation procedure is relatively less than the processing time in the end nodes. Therefore shortening of the processing time in the nodes is a crucial factor for fast rerouting. This paper focuses on this point and presents some suitable implementations on ATM nodes for fast protection switching. These architectures can attain protection time of less than 50 ms after the detection of a failure at an end node. The key is load-sharing of the hardware and firmware. This paper also sums up the effectiveness of ATM protection and the current situation of standardization in ITU-T SG13.