FPGA Implementation of a Digital Chaos Circuit Realizing a 3-Dimensional Chaos Model

Kei EGUCHI  Takahiro INOUE  Akio TSUNEDA  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E81-A   No.6   pp.1176-1178
Publication Date: 1998/06/25
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section LETTER (Special Section of Papers Selected from ITC-CSCC'97)
Category: Nonlinear Problems
chaos circuits,  discrete-time circuits,  digital circuits,  integrated circuits,   FPGA implementation,  

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In this letter, a digital circuit realizing a Rossler model is proposed. The proposed circuit features exact reproducibility of chaos signals which is desired in chaos-based communication systems. By employing an FPGA implementation, the proposed circuit can achieve high-speed and low-cost realization. The chaotic behavior of the quasi-chaos of the proposed circuit is analyzed by numerical simulations. To confirm the validity of the FPGA implementation, the proposed circuit is designed by using an FPGA CAD tool, Verilog-HDL. This circuit design showed that the proposed circuit can be implemented onto a single FPGA and can realize real-time chaos generation.