Exact Expected Test Length Generated by LFSRs for Circuits Containing Hard Random-Pattern-Resistant Faults

Kazuhiko IWASAKI  Hiroyuki GOTO  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E81-A   No.5   pp.885-888
Publication Date: 1998/05/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section LETTER (Special Section on Discrete Mathematics and Its Applications)
Category: 
Keyword: 
BIST,  test length,  random-pattern-resistant fault,  LFSR,  integer partition problem,  

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Summary: 
The exact expected test lengths of pseudo-random patterns that are generated by LFSRs are theoretically analyzed for a CUT containing hard random-pattern-resistant faults. The exact expected test lengths are also analyzed when more than one primitive polynomials are selected.