A High-Speed 6-Bit ADC Using SiGe HBT

Haruo KOBAYASHI  Toshiya MIZUTA  Kenji UCHIDA  Hiroyuki MATSUURA  Akira MIURA  Tsuyoshi YAKIHARA  Sadaharu OKA  Daisuke MURATA  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E81-A   No.3   pp.389-397
Publication Date: 1998/03/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 10th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
A/D converter,  folding/interpolation,  analog circuit,  SiGe HBT,  modeling,  

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Summary: 
This paper describes the design and performance of a high-speed 6-bit ADC using SiGe HBT for measuring-instrument applications. We show that the Gummel-Poon model suffices for SiGe HBT modeling and then we describe that the folding/interpolation architecture as well as simple, differential circuit design are suitable for ADC design with SiGe HBT. Measured results show that the nonlinearity of the ADC is within 1/2 LSB, and the effective bits are 5. 2 bits at an input frequency of 100 MHz and 4. 2 bits at 200 MHz with 768 MS/s. We also describe some design issues for folding/interpolation ADC.