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An 8 Bit Current-Mode CMOS A/D Converter with Three Level Folding Amplifiers
Kyung-Myun KIM Kwang Sub YOON
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/02/25
Print ISSN: 0916-8508
Type of Manuscript: Special Section LETTER (Special Section on Analog Circuit Techniques in the Digital-Oriented Era)
CMOS, three level folding amplifier, current-mode, A/D converter,
Full Text: PDF(382KB)>>
An 8 bit current-mode folding and interpolation analog to digital converter (ADC) with three-level folding amplifiers is proposed in this paper. A current-mode three-level folding amplifier is employed not only to reduce the number of reference current sources, but also to decrease a power dissipation within the ADC. The designed ADC fabricated by a 0. 8 µ m n-well CMOS double metal/single poly process occupies the chip area of 2. 2 mm 1. 6 mm. The experimental result shows the power dissipation of 33. 6 mW with a power supply of 5 V.