On Symbol Error Probability of DC Component Suppressing Systems

Akiomi KUNISA  Nobuo ITOH  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E81-A   No.10   pp.2174-2179
Publication Date: 1998/10/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section LETTER (Special Section on Information Theory and Its Applications)
Category: Coding Theory
Keyword: 
Reed-Solomon code,  digital signal recording,  DC component suppression,  symbol error probability,  

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Summary: 
The DC component suppressing method, called Guided Scrambling (GS), has been proposed, where a source bit stream within a data block is subjected to several kinds of scrambling and a RLL (Run Length Limited) coding to make the selection set of channel bit streams, then the one having the least DC component is selected. Typically, this technique uses a convolutional operation or GF (Galois field) conversion. A review of their respective symbol error properties has revealed important findings. In the former case, the RS (Reed-Solomon) decoding capability is reduced because error propagation occurs in descrambling. In the latter case, error propagation of a data block length occurs when erroneous conversion data occurs after RS decoding. This paper introduces expressions for determining the decoded symbol error probabilities of the two schemes based on these properties. The paper also discusses the difference in code rates between the two schemes on the basis of the result of calculation using such expressions.