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High Performance Two-Phase Asynchronous Pipelines
Sam APPLETON Shannon MORTON Michael LIEBELT
IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/03/25
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Issue on Asynchronous Circuit and System Design)
asynchronous, high performance, pipeline (architecture), computer design,
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In this paper we describe the implementation of complex architectures using a general design approach for two-phase asynchronous systems. This fundamental approach, called Event Controlled Systems, can be used to widely extend the utility of two phase systems. We describe solutions that we have developed that dramatically improve the performance of static and dynamic-logic asynchronous pipelines, and briefly describe a complex microprocessor designed using ECS.