An lterative Improvement Method for State Minimization of Incompletely Specified Finite State Machines

Hiroyuki HIGUCHI  Yusuke MATSUNAGA  

IEICE TRANSACTIONS on Information and Systems   Vol.E80-D   No.10   pp.993-1000
Publication Date: 1997/10/25
Online ISSN: 
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Logic Design
state minimization,  state reduction,  finite state machines,  binate covering problem,  compatible sets,  

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This paper proposes a heuristic algorithm for state minimization of incompletely specified finite state machines (FSMs). The strategy is similar to that in ESPRESSO, a wellknown heuristic algorithm for two-level logic minimization. It consists of generating an initial solution, the set of maximal compatibles, and attempting to apply a series of transformations to the solution. The main transformation is to reduce each compatible in the solution and delete unnecessary compatibles by iterative improvements. Other transformations, such as expansion and merging of compatibles, are also introduced for further reduction. When the number of compatibles is likely to be too large to handle explicitly, they are represented by a Binary Decision Diagram. Experimental results show that the proposed method finds better solutions in shorter CPU times for most of the examples than conventional methods.