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Large-Signal Analysis of Power MOSFETs and Its Application to Device Design
Noriaki MATSUNO Hitoshi YANO Yasuyuki SUZUKI Toshiaki INOUE Tetsu TODA Yasushi KOSE Yoichiro TAKAYAMA Kazuhiko HONJO
IEICE TRANSACTIONS on Electronics
Publication Date: 1997/06/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Microwave and Millimeterwave High-power Devices)
power device, MOSFET, large-signal simulation, cellular telephone,
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This paper describes novel techniques for analyzing power MOSFETs. Since the gate width of power MOSFETs is much larger than that of power MESFETs or HJFETs, an appropriate device design to suppress matching circuit losses is needed. These losses and the intrinsic device characteristics are analyzed employing the proposed techniques, which are based on large-signal simulations. Also, new formulas describing the dependence of saturated output power on gate width are derived to perform loss-minimized design. These techniques are applied to the design of power MOSFETs for GSM cellular telephones. As a result, an output power of 35.5 dBm with a power-added efficiency of 55% and a power gain of 10.5 dB at 900 MHz have been achieved.