FFT-Based Implementation of Sampling Rate Conversion with a Small Number of Delays

Xiaoxia ZOU  Shogo MURAMATSU  Hitoshi KIYA  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E80-A    No.8    pp.1367-1375
Publication Date: 1997/08/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing)
Category: 
Keyword: 
multirate signal processing,  sampling rate conversion,  overlap-add/save method,  

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Summary: 
Block delay caused by using fast Fourier transform (FFT), and computational complexity in sampling rate conversion system are considered in this paper. The relationship between the number of block delays and the computational complexity is investigated. The proposed method can avoid the redundant operations of sampling rate conversion completely and moreover provide a good trade-off between the number of block delays and the computational complexity. As a result, ti is shown that with the proposed method, the sampling rate conversion can be realized more efficiently under a small number of block delays.