An 8-bit 200Ms/s 500mW BiCMOS ADC

Yoshio NISHIDA  Kazuya SONE  Kaori AMANO  Shoichi MATSUBA  Akira YUKAWA  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E80-A   No.2   pp.328-333
Publication Date: 1997/02/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
Category: 
Keyword: 
analog-to-digital converter,  BiCMOS,  comparator,  sample-and-hold circuit,  

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Summary: 
This paper presents an 8-bit 200M-sample/s (Ms/s) analog-to-digital converter (ADC) applicable to liquid crystal display (LCD) driver systems. The ADC features such circuit techniques as a low-power and high-speed comparator, an open-loop sample-and-hold amplifier with a 3.4-ns acquisition time, a fully differential two step architecture, and a replica circuit. It is fabricated with a 0.8µm BiCMOS process onto an area of only 12mm2 and it dissipates 500mW from a single-5.2V power supply.