An Analysis of Frame Synchronization Systems with Racing Counters and Majority Rule for M-ary/SS Communication Systems

Kouji OHUCHI  Hiromasa HABUCHI  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E80-A   No.12   pp.2406-2412
Publication Date: 1997/12/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Spread Spectrum Techniques and Applications)
Category: 
Keyword: 
M-ary spread spectrum communication system,  M-ary/SSMA system,  frame synchronization system,  framing chips,  racing counters,  

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Summary: 
In this paper, a simple frame synchronization system for M-ary Spread Spectrum (M-ary/SS) communication system is analyzed. In particular, synchronization performance, bit error rate performance, and Spread Spectrum Multiple Access (SSMA) performance are analyzed. The frame synchronization system uses the racing counters. The transmitted signal contains framing chips that are added to spreading sequences. In the receiver, the framing chips are detected from several frames. The authors have proposed the simple frame synchronization system that detects framing chips from consecutive 2 frames. In this system, as the number of framing chips increases, synchronization performance improves and bit error rate performance degrades. In this paper a frame synchronization system that improves bit error rate performance is treated and analyzed. As the rusult, when the number of reference frames is 3, the bit error rate is much improved than the conventional system.