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Modulo 2p-1 Arithmetic Hardware Algorithm Using Signed-Digit Number Representation
Shugang WEI Kensuke SHIMIZU
IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/03/25
Print ISSN: 0916-8532
Type of Manuscript: LETTER
Category: Computer Hardware and Design
residue number system, redundant modular representation, signed-digit number representation, Mersenne number, binary adder tree,
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To realize high-speed computations in a residue number system (RNS), an implementation method for residue arithmetic circuits using signed-digit (SD) number representation is proposed. Integers mp = (2p-1) known as Mersenne numbers are used as moduli, so that modulo mp addition can be performed by an end-around-carry SD adder and the addition time is independent of the word length of operands. Using a binary modulo mp SD adder tree, the modulo mp multiplication can be performed in a time proportional to log2p.