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A 1-V MTCMOS Circuit Hardened to Temperature-Dependent Delay-Time Variation
Takakuni DOUSEKI Shin-ichiro MUTOH
IEICE TRANSACTIONS on Electronics
Publication Date: 1996/08/25
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
delay-time, temperature, variation, 1-volt, multithreshold, CMOS,
Full Text: PDF(522.7KB)>>
This paper describes the effects of operating temperature on delay time in a 1-V multi-threshold CMOS(MTCMOS) circuit, Delay-time analysis including the temperature factor shows that the delay-time variation of the CMOS circuit becomes amall for low-voltage operation and the variation is mainly determined by the threshold voltage and its variation-rate with temperature. As a design method of a MTCMOS circuit with both high-threshold and low-threshold MOSFETs, optimization of the low-threshold voltage at which the delay-time of the circuit is independent of operating temperature is described in detail. The validity of the design method is confirmed by the evaluation of a gate-chain TEG and a 1-V 12 K-gate digital-filter LSI fabricated with o.5-µm MTCMOS technology.