A Blanket Source Line Architecture with Triple Metal for Giga Scale Memory LSIs

Shigeki TOMISHIMA  Shigehiro KUGE  Masaki TSUKUDE  Tadato YAMAGATA  Kazutami ARIMOTO  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E79-C   No.6   pp.808-811
Publication Date: 1996/06/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section LETTER (Special Issue on ULSI Memory Technology)
Category: Dynamic RAMs
Keyword: 
memory,  triple metal,  source line,  layout,  

Full Text: PDF(311.6KB)>>
Buy this Article




Summary: 
A new source line routing architecture features a blanket-like source line made of double aluminum layers by utilizing a pure tungsten metal layer as the local interconnection layer in the peripheral region. The relaxed pitch of the signal lines improves the RC time delay constant of the signal lines and gives stable Vcc and Vss levels throughout the chip. Furthermore, this architecture brings about an 8% area reduction of the peripheral region in 256 Mb DRAMs with high performance,when used in collaboration with hierarchical bit-line architecture.