A 1.3 V Supply Voltage AlGaAs/InGaAs HJFET SCFL D-FF Operating at up to 10 Gbps

Masahiro FUJII  Tadashi MAEDA  Yasuo OHNO  Masatoshi TOKUSHIMA  Masaoki ISHIKAWA  Muneo FUKAISHI  Hikaru HIDA  

IEICE TRANSACTIONS on Electronics   Vol.E79-C   No.4   pp.512-517
Publication Date: 1996/04/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Ultra-High-Speed LSIs)
low power,  high speed,  GaAs,  heterojunction FET,  SCFL,  logic swing,  low supply voltage,  D-FF,  

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A high speed and low power consumption SCFL circuit design with low supply voltage is proposed. Focusing on the relationship between logic swing and supply voltage, the lower limit for the supply voltage is presented. Theoretical analysis and circuit simulation indicates that the logic swing needs to be optimized to maintain high average gm within the swing. An SCFL D-FF fabricated using a 0.25 µm n-AlGaAs/i-InGaAs HJFET process operates at up to 10 Gbps with power consumption as low as 19 mW at a supply voltage of 1.3 V.