Test Structure for the Evaluation of Si Substrates

Yoshiko YOSHIDA  Mikihiro KIMURA  Morihiko KUME  Hidekazu YAMAMOTO  Hiroshi KOYAMA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E79-C   No.2   pp.192-197
Publication Date: 1996/02/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: SOI & Material Characterization
Keyword: 
silicon substrate,  crystal defect,  TDDB,  test structure,  

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Summary: 
The quality of Si substrates affecting the oxide reliability was investigated using various kinds of test structures like flat capacitor, field edge array and gate edge array. The field edge array test structure which resembles the conditions found for real device is shown to be quite effective to determine the quality of oxides. Oxide grown on a P type epitaxial layer on P+ silicon substrate shows the highest reliability in all test structures. Gettering of heavy metals and/or crystal defects by the P+ silicon substrate is the dominant mechanism for the improvement of the oxide reliability. H2 annealed silicon shows a good reliability if monitored using the flat capacitor. However, using the field edge array test structure, which is strongly influenced by real device process, the reliability of the oxide grown on H2 annealed silicon degrades.