Test Structures and a Modified Transmission Line Pulse System for the Study of Electrostatic Discharge

Robert A. ASHTON  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E79-C   No.2   pp.158-164
Publication Date: 1996/02/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: Device and Circuit Characterization
Keyword: 
integrated electronics,  semiconductor materials and devices,  ESD,  test structures,  reliability,  

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Summary: 
ElectroStatic Discharge (ESD) testing of integrated circuits subjects circuit elements to very high currents for short periods of time. A modified Transmission Line Pulse (TLP) measurement system for characterizing transistors and other circuit elements under high currents for ESD performance prediction and understanding is presented which can both stress devices and measure leakage. For the TLP system to yield useful information test structures are needed which vary the important design parameters for the circuit elements. Guidelines for transistor test structure design for use with the system are presented and demonstrated for PMOS transistors.