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A realization of an arbitrary BPC Permutation in Hypercube Connected Computer Networks
Hiroshi MASUYARA Yuichiro MORITA Etsuko MASUYAMA
Publication
IEICE TRANSACTIONS on Information and Systems
Vol.E78D
No.4
pp.428435 Publication Date: 1995/04/25 Online ISSN:
DOI: Print ISSN: 09168532 Type of Manuscript: PAPER Category: Computer Networks Keyword: BPC permutation, hypercube, routing steps, token memory registers, routing algorithm,
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Summary:
A multiple instruction streammultiple data stream (MIMD) computer is a parallel computer consisting of a large number of identical processing elements. The essential feature that distinguishes one MIMD computer family from another is the interconnection network. In this paper, we are concerned with a representative type of interconnection networks: the hypercube connected network. A family of regular graphs is presented as a possible candidate for the implementation of a distributed system and for faulttolerant architectures. The symmetry of graphs makes it possible to determine message routing by using a simple distributed algorithm. A candidate having the same property is the hypercube connected network. Arbitrary data permutations are generally accomplished by sorting. For certain classes of permutations, however, this is, for many frequently used permutations in parallel processing such as bit reversal, bit shuffle, bit complement, matrix transpose, butterfly permutations used in FFT algorithms, and segment shuffles, there exist algorithms that are more efficient than the best sorting algorithm. One such class is the bit permute complement (BPC) class of permutations. In this paper, we, first, develop an algorithm to realize an arbitrary BPC permutation in hypercube connected networks. The developed algorithm in hypercube connected networks requires only 1 token memory register in each node. We next evaluate the ability to realize BPC permutations in these networks of an arbitrary size by estimating the number of required routing steps.

