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An ATM Chip Set for High Performance Computer Interfaces, Affording over 100 Mbps Sustained Throughput
Yasuharu TOMIMITSU Satoru KAWANAGO Hirotaka YAMANE Hideki KOBUNAYA Shoji OHGANE Nobuyuki MIZUKOSHI Hiroshi SUZUKI
IEICE TRANSACTIONS on Electronics
Publication Date: 1995/12/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Low-power Analog, Digital LSIs and ASICs for Multimedia)
ATM, LAN, B-ISDN, digital network,
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The transmission and processing of multimedia information requires a high-speed communications network infrastructure. This is especially true for the networks between the user's computer and the information highway. An Ethernet LAN is widely used for these networks, but it has limited throughput. Asynchronous Transfer Mode (ATM) LAN technology is a promising approach to overcome this limitation. We have developed a chip set which can be used to connect personal computers (PCs) and workstations (WSs) to a 156-Mbps ATM LAN. The advanced architecture, optimized performance and efficient buffer management enables a sustained more than 100 Mbps transfer speed to be obtained. The chip set is implemented in a 0.8 µm triple metal-layer CMOS process to integrate total 460 K transistors and consumes total 4 W at 5 V.