Simplification of Viterbi Algorithm for (1, 7) RLL Code

Yoshitake KURIHARA
Hisashi OSAWA
Yoshihiro OKAMOTO

IEICE TRANSACTIONS on Electronics   Vol.E78-C    No.11    pp.1567-1574
Publication Date: 1995/11/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Ultra High Density Information Storage Technologies)
digital magnetic recording,  (1,7) RLL code,  partial response system,  Viterbi detection,  

Full Text: PDF(572.3KB)>>
Buy this Article

Simplification of the Viterbi algorithm and the error rate performance are presented for a partial response maximum-likelihood (PRML) system employing the PR(1, 1) system as a PR system for (1, 7) run-length limited (RLL) code. The minimum run-length of 1's or O's in the output sequence of the precoder for (1, 7) RLL code is limited to 2. Two kinds of simplified Viterbi algorithms using this run-length constraint are proposed. One algorithm requires the path memory length of only two in the Viterbi detector. The Viterbi detector based on the other algorithm is equivalent to the simple PR(1, 1) system followed by a threshold detector. The bit-error rates of PRML systems with Viterbi detectors based on these algorithms are obtained by computer simulation and their performance is compared with that of conventional PRML systems for (1, 7) RLL code. It is shown that the proposed PRML system exhibits better performance than conventional PRML systems at high recording density.