Design of Repairable Cellular Arrays on Multiple-Valued Logic

Naotake KAMIURA  Yutaka HATA  Kazuharu YAMATO  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E77-D   No.8   pp.877-884
Publication Date: 1994/08/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8532
Type of Manuscript: PAPER
Category: Fault Tolerant Computing
Keyword: 
multiple-valued logic,  ecllular array,  fault diagnosis,  repair,  design for testability,  

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Summary: 
This paper proposes a repairable and diagnosable k-valued cellular array. We assume a single fault, i.e., either stuck-at-O fault or stuck-at-(k1) fault of switches occurs in the array. By building in a duplicate column iteratively, when a stuck-at-(k1) fault occurs in the array, the fault never influences the output of the array. That is, we can construct a fault-tolerant array for the stuck-at-(k1) fault. While, for the stuck-at-O fault, the diagnosing method is simple and easy because we don't have to diagnose the stuck-at-(k1) fault. Moreover, our array can be repaired easily for the fault. The comparison with other rectangular arrays shows that our array has advantages for the number of cells and the cost of the fault diagnosis.