Characterization for Negative Differential Resistance in Surface Tunnel Transistors

Tetsuya UEMURA  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E77-C   No.9   pp.1444-1449
Publication Date: 1994/09/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Heterostructure Devices and Epitaxial Growth Techniques)
Category: 
Keyword: 
tunnel transistor,  interband tunneling,  negative differential resistance,  bistable circuit,  trap-assisted tunneling,  

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Summary: 
Gate-controlled negative differential resistance (NDR) due to interband tunneling has been observed at room temperature in a Surface Tunnel Transistor (STT). The STT consists of a highly degenerate p+-drain, an n+-doped channel with an insulated gate, and an n+-source connected to the channel. To demonstrate application as a functional device, a bistable circuit consisting of only one STT and one load resistor was organized and its operation was confirmed. The obtained valley current in the NDR characteristics of the STT, however, is relatively large and limits the device performance. In order to clarify the origin of the valley current, we fabricated p+-n+ tunnel diodes in which growth interruption was done at the pn junction, and investigated the dependence of the NDR characteristics on both the impurity concentration at the regrown interface and the temperature. These measurements indicate that the valley current is mainly caused by the excess tunneling current through traps formed by the residual oxygen at the regrown interface.