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A Flexible Search Managing Circuitry for High-Density Dynamic CAMs
Takeshi HAMAMOTO Tadato YAMAGATA Masaaki MIHARA Yasumitsu MURAI Toshifumi KOBAYASHI Hideyuki OZAKI
IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: General Technology
content addressable memory, associative memory, dynamic memory, functional memory,
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New circuit techniques were proposed to realize a high-density and high-performance content addressable memory (CAM). A dynamic register which functions as a status flag, and some logic circuits are organically combined and flexibly perform complex search operations, despite the compact layout area. Any kind of logic operations for the search results, that are AND, OR, INVERT, and the combinations of them, can be implemented in every word simultaneously. These circuits are implemented in an experimental 288 kbit dynamic CAM using 0.8 µm CMOS process technology. We consider these techniques to be indispensable for high-density and high-performance dynamic CAM.