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CMOS Embedded RAMs for Digital Communication Systems
Masao MIZUKAMI Yoichi SATOH Takahiko KOZAKI Yasuo MIKAMI
IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: General Technology
electronic circuit, semiconductor devices, memory technologies, switch,
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This paper describes CMOS embedded RAMs we developed utilizing 1.3 µm and 0.8 µm process technologies. Our goal was to achieve high-performance switching for digital communication systems. Because such switching can best be obtained by using high-performance embedded RAMs, we used 0.8 µm process technology and developed a 4 kW9 b single-port embedded RAM with 5 ns access time and 100 mW power dissipation during32 MHz operation, and a 1 kW9 b dual-port embedded RAM with 3.7 ns access time and 100 mW power dissipation during 40 MHz operation. We implemented these RAMs on one chip in developing three time-switch VLSIs, one buffer memory VLSI for ATM switches, and two cross-connect switch VLSIs.