For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Process and Device Technologies for Subhalf-Micron LSI Memory
Katsuhiro TSUKAMOTO Hiroaki MORIMOTO
IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: General Technology
LSI memory, lithography, etching, MOS transistor, dielectric material,
Full Text: PDF(627.8KB)>>
The progress of LSI technologies makes it possible to fabricate 256 MDRAM. However, it depends on the cost effectiveness of device fabrication that LSI memory can continue to be the technology driver or not. It is indispensable to make the device, process, and equipment as simple as possible for next generation LSI. For example, wavefront technologies in lithography, high energy ion implantation, and simple DRAM cell with SOI structure or high dielectric constant capacitor, are under development to satisfy both device performance improvement and process simplicity.