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Very-High-Speed Analog Neural Network LSI Using Super Self-Aligned Si Bipolar Process Technology
Shigeki AISAWA Kazuhiro NOGUCHI Masafumi KOGA Takao MATSUMOTO Yoshihito AMEMIYA
IEICE TRANSACTIONS on Electronics
Publication Date: 1994/06/25
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Integrated Electronics
neural network, analog LSI, optical WDM,
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A very-high-speed ten-neuron analog neural network LSI chip is fabricated for the first time using super self-aligned Si bipolar process technology. The LSI consists of ten neurons and 100 electrically modifiable synaptic weights. The neural network nonlinear mapping function to solve the four-bit parity problem is successfully demonstrated at 150 mega-patterns/sec. The operation speed of this neural network is, to the best of the authors, knowledge, the fastest yet reported.