A Well-Synchronized Sensing/Equalizing Method for Sub-1.0-V Operating Advanced DRAM's

Tsukasa OOISHI  Mikio ASAKURA  Shigeki TOMISHIMA  Hideto HIDAKA  Kazutami ARIMOTO  Kazuyasu FUJISHIMA  

IEICE TRANSACTIONS on Electronics   Vol.E77-C    No.5    pp.762-770
Publication Date: 1994/05/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))

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We propose an advanced DRAM array driving technique which can achieve low-voltage operation, which we call a well-synchronized sensing and equalizing method. This method sets the DRAM array free from the body effect, achieves a small influence of the short channel effect, and reduces the leakage current. The sense and restore amplifier and equalizer can operate rapidly under a low-voltage operating condition such as 1.0 V Vcc. Therefore, we can make determining the Vth easy for the satisfaction of the high-speed, the low-power dissipation, and a simple device structure. The well-synchronized sensing and equalizing method is applicable to low-voltage operating DRAM's with capacity of 256 Mbits and more.