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A Proposal of New Multiple-Valued Mask-ROM Design
Yasushi KUBOTA Shinji TOYOYAMA Yoji KANIE Shuhei TSUCHIMOTO
IEICE TRANSACTIONS on Electronics
Publication Date: 1994/04/25
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
semiconductor devices, mask-ROM, multiple-value, threshold voltage, channel length,
Full Text: PDF(567.1KB)>>
A new multiple-valued mask-ROM cell and a technique suitable for data detection are proposed. The information is programmed in each of the memory cells as both the threshold voltage and the channel length of the memory cell transistor, and the stored data are detected by selecting the bias condition of both the word-line and the data-line. The datum stored in the channel length is read-out using punch-through effect at the high drain voltage. The feasibility of this mask-ROM's is studied with device simulation and circuit simulation. With this design, it would be possible to get the high-density mask-ROM's, which might be faster in access speed and easier in fabrication process than the conventional ones. Therefore, this design is expected to be one of the most practical multiple-valued mask-ROM's.