An Overview of Video Coding VLSIs

Ryota KASAI  Toshihiro MINAMI  

IEICE TRANSACTIONS on Electronics   Vol.E77-C   No.12   pp.1920-1929
Publication Date: 1994/12/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: INVITED PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Processors
video compression/decompression,  VLSI architecture,  video signal processor,  building block approach,  low-power technology,  

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There are two approaches to implementing the international standard video coding algorithms such as H.261 and MPEG: a programmable DSP approach and a building block approach. The advantages and disadvantages of each are discussed here in detail, and the video coding algorithms and required throughput are also summarized. For more complex standard such as MPEG-, VLSI architecuture became more sophisticated. The DSP approach incorporates special processing engines and the building block approach integrates general-purpose microprocessors. Both approaches are capable of MPEG- NTSC coding in a single chip. Reduction of power consumption is a key issue for video LSIs. Architectures and circuits that reduce the supply voltage while maintaining throughput are summarized. A 0.25-µm, 3-GOPS, 0.5-W, SIMD-VSP for portable MPEG- systems could be made by using architecture-driven voltage scaling as well as feature-size scaling and SOI devices.