Development of Improved Low Power MUSE (HDTV) Decoder Chip Set 2.5th Generation MUSE Chip Set

Kiyoshi KOHIYAMA  Kota OTSUBO  Hidenaga TAKAHASHI  Kiyotaka OGAWA  Yukio OTOBE  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E77-C   No.12   pp.1859-1864
Publication Date: 1994/12/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Multimedia, Analog and Processing LSIs)
Category: Multimedia System LSIs
Keyword: 
HDTV,  MUSE,  LSI,  power,  

Full Text: PDF>>
Buy this Article




Summary: 
Development of low power MUSE (Multiple Sub-Nyquist Sampling Encoding) chip set through reduction in operating voltage (from 5 V to 3.7 V) is described. This leads to great cost reduction since the chips could be mounted on low cost plastic packages and the necessity for cooling fans to dissipate heat was obviated. To maintain compatibility with standard 5 V analog and digital peripherals such as 4 Mbit DRAMs and an A/D converter, a special voltage-level converter was also developed.