Neural Networks for Digital Sequential Circuits

Hiroshi NINOMIYA  Hideki ASAI  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E77-A    No.12    pp.2112-2115
Publication Date: 1994/12/25
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: Neural Networks
Hopfield neural networks,  optimization problem,  digital sequential circuits,  energy function,  global convergence,  

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In this letter an SR-latch circuit using Hopfield neural networks is introduced. An energy function suited for a neural SR-latch circuit is defined for which the global convergence is guaranteed. We also demonstrate how to compose master-slave (M/S) SR- and JK-flip flops of novel SR-latch circuits, and further an asynchronous binary counter of M/S JK-flip flops. Computer simulations are included to illustrate how each presented circuit operates.