A Si Bipolar 1.4-GHz Time Space Switch LSI for B-ISDN

Osamu MATSUDA  Shin-ichiro HAYANO  Takao TAKEUCHI  Hideki KITAHATA  Hisashi TAKEMURA  Tsutomu TASHIRO  

IEICE TRANSACTIONS on Electronics   Vol.E76-C    No.5    pp.858-862
Publication Date: 1993/05/25
Online ISSN: 
Print ISSN: 0916-8516
Type of Manuscript: Special Section LETTER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))

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A 155-Mb/s 3232 Si bipolar switch LSI is designed and implemented for a wide application in the broad-band ISDN. The operating speed is 1.4 GHz using an A-BSA Si bipolar process. Its throughput is 5.0 Gb/s by handling four 1.4-GHz interfaces, each of which supports an eight-channel multiplexed data stream. To realize a highly integrated high-speed bipolar LSI, power consumption and chip area should be reduced. Two technologies are newly developed for the LSI, namely, 1) active pull-down circuit with an embedded bias circuit in each gate, and 2) modified standard cell with overlapped cell-channel structure. Using these technologies, total power consumption and chip area are reduced to 60% and 70%, respectively, of what is expected when conventional ECL technologies and standard cell structures are used. The LSI evaluation results show that the developed LSI has sufficient performance to realize a large-scale B-ISDN switching system.