A Design Method of SFS and SCD Combinational Circuits

Shin'ichi HATAKENAKA  Takashi NANYA  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E75-D   No.6   pp.819-823
Publication Date: 1992/11/25
Online ISSN: 
DOI: 
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Issue on Pacific Rim International Symposium on Fault Tolerant Systems)
Category: 
Keyword: 
self-checking circuits,  strongly fault-secure,  strongly code-disjoint,  combinational circuits,  concurrent error detection,  

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Summary: 
Strongly Fault-Secure (SFS) circuits are known to achieve the TSC goal of producing a non-codeword as the first erroneous output due to a fault. Strongly Code-Disjoint (SCD) circuits always map non-codeword inputs to non-codeword outputs even in the presence of faults so long as the faults are undetectable. This paper presents a new generalized design method for the SFS and SCD realization of combinational circuits. The proposed design is simple, and always gives an SFS and SCD combinational circuit which implements any given logic function. The resulting SFS/SCD circuits can be connected in cascade with each other to construct a larger SFS/SCD circuit if each interface is fully exercised.