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A 250-Mb/s, 700-mW, 32-Highway 8-b S/P Converter LSI with Cross-Access Memory
Yusuke OHTOMO Masao SUZUKI
IEICE TRANSACTIONS on Electronics
Publication Date: 1992/04/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Joint Special Issue on the 1991 VLSI Circuits Symposium)
Full Text: PDF(748.3KB)>>
A multihighway serial/parallel (S/P) converter LSI chip suitable for the broad-band Integrated Services Digital Network (B-ISDN) node interface is presented. The chip, fabricated with 0.8-µm BiCMOS technology, handles 32-highway 8 b of S/P, P/S conversion at up to 250 Mb/s and has a power dissipation of 700 mW. The features cross-access memory and a current-cut-type CMOS/ECL interface circuit. Each of these features is described and evaluated. A newly developed BiNMOS-type D-flip-flop (D-FF) is used to speed up the cross-access memory and is compared to a CMOS D-FF.