For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
A 1-K ECL Gate Array Implemented with Fully Self-Aligned AlGaAs/GaAs Heterojunction Bipolar Transistors
Nobuyuki HAYAMA Yuzuru TOMONOH Hideki TAKAHASHI Kazuhiko HONJO
IEICE TRANSACTIONS on Electronics
Publication Date: 1992/10/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Compound Semiconductor Integrated Circuits)
HBT, gate array, ring oscillator, propagation delay time,
Full Text: PDF(718.1KB)>>
The paper describes the design considerations, fabrication process and performance of the newly developed 1-K ECL gate array implemented with fully self-aligned AlGaAs/GaAs hoterojunction bipolar transistors (HBTs). This gate array consists of 960 three-input OR/NOR ECL basic gates. It contains about 7,600 transistors in a chip area 8.15-mm8.45-mm. The basic (FI=FO=1, wiring length L=0-mm) and loaded (FI=FO=3, L=1-mm) gates exhibit delay times of 33-ps and 82-ps, respectively, with 8.5-mW/gate power dissipation. From the measured values, fan-in, fan-out and wiring delay times of 9-ps/FI, 7-ps/FO and 17-ps/mm are estimated, respectively. These results are in good agreement with the designed results obtained using "SPICE" simulation.